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Computer Architecture

Last updated May 26, 2023 Edit

# Von Neumann Architecture

ALU: Arithmetic Logic Unit Accumulator: Does addition

# Buses

Address Bus: Transmits the address from the processor to the memory or I/O controller. Unidirectional: from the processor to memory and input-output devices.

Data Bus: Sends data between the processor, memory and input-output devices. It is bidirectional.

Control bus: Signals sent by the processor to control the memory and peripheral devices. Bidirectional: From the processor to the memory and input-output devices.

# Address Bus

# Data Bus

# Control Bus

# Registers


Stored program concept: Machine code instructions stored in main memory are fetched and executed serially.

General purpose registers are named R0-R12

# Memory Unit

# Read Operation

# Write Operation

# Processor ALU & CU

# Processor: CU

# I/O Controller

# Assembly Language

# Assembly Language Addressing

Immediate addressing:

Direct addressing:

Other forms of addressing do exist, but are not relevant for A Level.

Assembly instructions are provided in an exam, you do not need to learn them.

# RISC vs CISC

RISC:

CISC:


# Control Bus Signals

# CBS questions

a) 9D needs reading.

b) To write the data 76 to address 99, you would need to:

# Fetch-Decode-Execute cycle

# Fetch

# Decode

# Execute

# Registers (RECAP)

PC: Program counter contains the allocation of the instruction which has to be fetched. MAR: Using the address bus, the contents of the PC is copied to the MAR MDR: The instruction at that particular location is copied to the MDR temporarily CIR: Stores the currently processing instruction

# Interrupts

# Vectored Interrupt Mechanism

# Interrupted Interrupt


# End of Topic

  1. What are the three types of bus and their functions? Data bus -> Transports data between components Control bus -> Carries control signals and instructions Address bus -> Allows referencing of memory locations

  2. How are memory locations addressed? Each memory location has a unique ID which allows for it to be referenced through a memory address bus.

  3. The ALU is responsible for various arithmetic and logical functions within the processor.

  4. The control unit controls the memory and peripheral devices through control signals sent over the control bus (lots of control). It also receives interrupts over the bus.

  5. List different registers


# Processing Speed

# CPU Performance

# Cores

# Cores Linked

# Clock Rate

# Overclocking

# Cache

# Cache Types

Level 1:

L1 and L2 cache are dedicated to each core, however L3 cache is shared between all cores.

# Cache Size

# Data Word Size

# Embedded Systems

# Input devices

# 2D Scanners

# 3D Scanners

# Barcode Reader

# QR Codes

# Digital Cameras

# Microphone, Keyboard and Mouse

# Voice Recognition System

# Radio Frequency Identification (RFID)

# Passive tags

# Active tags

# Sensors

# Output

# Inkjet Printer

# Piezoelectric

# Thermal Bubble

# Laser Printer

# 3D Printers

Theory